d-Matrix Raptor 3D-DRAM Accelerator for Generative Inference at Hot Chips 2026
d-Matrix introduced the Raptor 3D-DRAM accelerator for generative inference at Hot Chips 2026. The chip fuses DRAM directly beneath the compute and removes the PHY to achieve SRAM-class bandwidth while using 1/10th the power of HBM. d-Matrix claims the architecture provides a 10x speed advantage over GPUs and 10x the bandwidth of HBM4. The design aims to resolve the AI memory wall by increasing bandwidth density and reducing power consumption compared to traditional high-bandwidth memory solutions.
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- ✓ d-Matrix unveiled the Raptor 3D-DRAM accelerator for generative inference at Hot Chips 2026.
- ✓ The Raptor chip fuses DRAM beneath the compute and drops the PHY.
- ✓ The architecture achieves SRAM-class bandwidth at 1/10th the power of HBM.
What changed
d-Matrix unveiled the Raptor 3D-DRAM chip and its specific power and bandwidth specifications at Hot Chips 2026.
Live updates
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d-Matrix Unveils Raptor 3D-DRAM Accelerator at Hot Chips 2026
d-Matrix introduced the Raptor 3D-DRAM accelerator for generative inference at Hot Chips 2026. The chip fuses DRAM directly beneath the compute and removes the PHY to achieve SRAM-class bandwidth while using 1/10th the power of HBM. d-Matrix claims the architecture provides a 10x speed advantage over GPUs and 10x the bandwidth of HBM4. The design aims to resolve the AI memory wall by increasing bandwidth density and reducing power consumption compared to traditional high-bandwidth memory solutions.
Why it matters
Generative AI inference is currently limited by the memory wall, where data movement between memory and compute creates bottlenecks. This architecture attempts to bypass those limits by integrating memory and compute vertically. This development occurs as memory shortages contribute to rising AI server prices.
What is confirmed
- d-Matrix unveiled the Raptor 3D-DRAM accelerator for generative inference at Hot Chips 2026.
- The Raptor chip fuses DRAM beneath the compute and drops the PHY.
- The architecture achieves SRAM-class bandwidth at 1/10th the power of HBM.
Still unconfirmed
- The Raptor chip provides 20x bandwidth density over NVIDIA Rubin.
What to watch next
- Independent benchmarks comparing Raptor bandwidth to HBM4
- Production timelines and availability for the Raptor chip
- Customer adoption rates for 3D-DRAM inference accelerators
confidence 80%Sources used for this update (8)
- ServeTheHome — d-Matrix Raptor 3D-DRAM Accelerator for Generative Inference at Hot Chips 2026
- Wccftech — d-Matrix’s Raptor 3D DRAM Achieves SRAM-Class Bandwidth at 1/10th the HBM Power by Dropping PHY & Fusing DRAM Beneath the Compute
- Startup Fortune — d-Matrix's Raptor Chip Aims to Break AI's Memory Wall at Hot Chips 2026
- StartupHub.ai — D-Matrix Claims 10x AI Speed Advantage Over GPUs
- Notebookcheck — SanDisk makes first 3D Matrix Memory chips — aiming for half the cost per bit of DRAM
- startupfortune.com — d-Matrix's Raptor Chip Aims to Break AI's Memory Wall at Hot Chips 2026
- hothardware.com — d-Matrix Claims 20x Bandwidth Density Over NVIDIA Rubin In New Chip
- www.techpowerup.com — Intel Details "Crescent Island" Graphics: 32 Xe3P Cores, up to 480 GB LPDDR5X Memory
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