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Challenges In Scaling Chips To 2nm And Below

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Key Takeaways Scaling to 2nm and below continues due to power improvements per watt, but progress is much more challenging and costly. Solutions to problems often create other problems due to less margin for tradeoffs, often requiring larger interposers, more chiplets, and more complex packages. New levels of precision are required throughout the design-through-manufacturing flow, … Read more

Tool Matching Getting Tougher Across Test & Metrology

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Key Takeaways Engineers leverage both device-specific and tool-level data to identify a process “sweet spot.” Tight, frequent tool-to-tool matching enables greater yield and fab flexibility. Machine learning helps capture the nuances of a tool’s signature. Many people outside of the semiconductor industry wonder how humans can fabricate transistors with tens of nanometer scale dimensions on … Read more