Tool Matching Getting Tougher Across Test & Metrology

Key Takeaways Engineers leverage both device-specific and tool-level data to identify a process “sweet spot.” Tight, frequent tool-to-tool matching enables greater yield and fab flexibility. Machine learning helps capture the nuances of a tool’s signature. Many people outside of the semiconductor industry wonder how humans can fabricate transistors with tens of nanometer scale dimensions on … Read more

Catching Critical Defects In TSVs And Stacked Chips

Key Takeaways Variation becomes a bigger problem in multi-die assemblies with TSVs and hybrid bonding. Multi-modal approaches are required to test these devices. AI can play a significant role in distinguishing between yield-killing and nuisance variations and significantly reduce false positives. New methods for interconnecting devices using through-silicon vias (TSVs) and hybrid bonding in stacked … Read more